[Symptom]
During programming (EPR) using NETIMPRESS, the error "113D: FPGA RECEIVE TIMEOUT" is displayed,
and the process is interrupted.
[Cause]
This error occurs when the programmer (FPGA) fails to receive a response from the microcontroller
within a certain time.
The main causes are as follows:
・ Communication Timeout
In JTAG communication, the execution result after sending a command was not received correctly,
and the program remained waiting for a response for the specified time.
・Physical Connection Failure
Communication signals (TDO, etc.) are interrupted due to wiring errors or poor contact
in pin fixtures/connectors.
・If it occurs constantly: High probability of wiring errors or insufficient power supply to the target.
・ If it occurs occasionally: High probability of unstable contact or noise interference.
・ Microcontroller Security Restriction
JTAG access is restricted (locked) by the microcontroller's settings. In this case, programming is
rejected as intended.
[Solution]
Please check the hardware environment and software settings according to the following procedure.
1. Improving Connection Status and Physical Environment
・ Check Wiring
Check for loose connectors and broken cables.
・Noise Reduction
Tightly bundling communication cables with cable ties, etc., can cause crosstalk noise.
Try unbundling the wiring or connecting them using the shortest possible path to see if that
improves the situation.
・Check Connection of /TRST Signal
If the Micom pack manual instructs you to connect /TRST (JTAG reset), not connecting
it may cause JTAG initialization to fail and trigger this error.
・Blocking Power Supply Noise
Consider installing a noise filter or noise-cutting transformer to avoid noise interference from the AC line.
2. Updating Definition / Micom pack Files and Firmware / FPGA (Troubleshooting)
If you are using an older version, updating to the latest version may improve the situation.
・Updating Definition Files and Micom Packs
Please contact our support team with the name and version of your definition / Micom Pack file
(or CM/PRM/BTP file name) to inquire about the availability of the latest version.
・Update Main Unit Firmware and FPGA
Please update the programmer's firmware and FPGA to the latest versions. Even if the cause cannot be identified, verifying operation with the latest version is strongly recommended as the first step
in resolving the problem.
3. Workarounds and Situation Checks
・Restart Target
Check if the problem improves by re-energizing the target (power-on reset) or by running EPR again while the power is on. (＊This is not a permanent solution)
・Comparison Check with Blank Units
Check if there is a difference in behavior between an unprogrammed unit (blank unit) and a reprogrammed unit
(programmed unit). If there is a difference, the aforementioned security restrictions may be the cause.
[If the problem persists]
If the above measures do not improve the situation, please contact [Support Inquiry] with the following information:
・Microcontroller model
・Model name and version of the definition / Micom pack being used
・Reproducibility of the phenomenon (does it occur 100% of the time, or rarely), error rate, etc.